MachXO2

前所未有的灵活桥接和I/O扩展功能

相关产品

瞬时启动，迅速实现控制——启动时间小于1mS，MachXO2可以在上电时迅速控制信号，以确保出色的系统性能和可靠的运行。

通过内部逻辑提升系能性能——内置硬件加速逻辑和高达6864 LUT4，MachXO2帮助您减轻处理器工作负担并提升系统性能。

更多电压选择，节省更多成本——拥有3.3/2.5V和1.2V内核电压选择，待机功耗低至22μW，您可以选择让MachXO2使用上电时最先可用的电源电压启动。

特性

  • 高达256 Kbit的用户闪存和240 Kbit sysMEMTM嵌入式块RAM
  • 高达334个可热插拔的IO，可防止额外漏电
  • 通过JTAG、SPI和I2C和Wishbone进行编程
  • TransFR功能支持现场设计升级，无需中断设备运行
  • 可编程sysIOTM缓冲器支持LVCMOS、LVTTL、PCI、LVDS、LVDS、MLVDS、RSDS、LVPECL、SSTL、HSTL等接口

跳转到

产品系列表

MachXO2选型指南

  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
LUT密度 256 640 640 1280 1280 2112 2112 4320 6864
EBR RAM块（9 Kbit/块） 0 2 7 7 8 8 10 10 26
EBR SRAM (Kbit) 0 18 64 64 74 74 92 92 240
分布式SRAM (Kbit) 2 5 5 10 10 16 16 34 54
用户闪存(Kbit) 0 24 64 64 80 80 96 96 256
PLL + DLL 0 0 1 + 2 1 + 2 1 + 2 1 + 2 2 + 2 2 + 2 2 + 2
DDR/DDR2/LPDDR存储器支持 - - 是 是 是 是 是 是 是
配置存储器 内部闪存
双引导1 是 是 是 是 是 是 是 是 是
嵌入式功能块 I2C (2), SPI (1),定时器(1)
内核Vcc 1.2 V ZE ZE - ZE - ZE & HE HE ZE & HE ZE & HE
内核Vcc 2.5 - 3.3 V HC HC HC HC HC HC HC HC HC
Temp C 是 是 是 是 是 是 是 是 是
Temp I 是 是 是 是 是 是 是 是 是
0.4 mm引脚间距 I/O 数量
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
25-ball WLCSP (2.5 x 2.5 mm) 18
49-ball WLCSP (3.2 x 3.2 mm) 38
64-ball ucBGA (4 x 4 mm) 44
0.5 mm引脚间距 I/O 数量
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
32-pin QFN (5 x 5 mm) 21 21
84-pin QFN (7 x 7 mm) 683
132-ball csBGA (8 x 8 mm) 55 79 104 104 104
184-ball csBGA (8 x 8 mm)2 150
100-pin TQFP (14 x 14 mm) 55 78 79 79
144-pin TQFP (20 x 20 mm) 107 107 111 114 114
0.8 mm引脚间距 I/O 数量
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
256-ball caBGA (14 x 14 mm) 206 206 206
332-ball caBGA (17 x 17 mm) 274 278
1.0 mm引脚间距 I/O 数量
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
256-ball ftBGA (17 x 17 mm) 206 206 206 206
484-ball fpBGA (23 x 23 mm) 278 278 334

1. 双引导需要外部引导闪存支持

2. 仅HE器件有此封装

3. 仅HC & ZE器件有此封装

解决方案实例

Interface_expansion放大图片

微处理器接口扩展

  • 通过为低成本的微控制器添加GPIO来节省成本
  • 为系统控制处理器添加额外的SPI和I2C接口
  • 快速添加高性能的DDR SRAM和闪存接口
  • 使用PLD实现系统状态寄存器来简化系统管理
Timing_offload放大图片

更好的实时功能简化了时序控制

  • 使用瞬时上电逻辑，在系统上电时精确地控制信号
  • 实现PWM功能，精确地产生模拟电压用于照明和电机控制
  • 构建传感器缓冲器和智能中断，确保实时事件被捕获
  • 使用硬件UART克服软件实现的性能限制
Hardware Acceleration Block Diagram放大图片

通过硬件性能加速提升系统性能

  • 基于逻辑的信号过滤降低了处理器负荷
  • 以最小的处理器开销实现图像旋转、缩放以及图像组合
IO_expansion放大图片

使用灵活的接口桥接，为您的设计选择理想的组件

  • 低成本微控制器和常用的显示接口，如RGB和7:1 LVDS之间的桥接
  • 可以将HiSPi、LVDS或并行RGB图像传感器连到几乎所有的处理器，优化了性能和成本
  • 通过不同的电压和各种接口，如SPI、I2C、SDIO、PCI和LPC之间的桥接，最大化组件选择的灵活性

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

软件

覆盖整个设计流程，非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件，轻松完成在系统编程和在线重配置

文档

快速参考
技术资源
资讯资源
下载
标题编号版本日期格式文件大小
选择全部
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-020111.210/11/2019PDF2.1 MB
Designing for Migration from MachXO2-1200-R1 to Standard (Non-R1) Devices
FPGA-AN-020121.31/22/2021PDF686.9 KB
I3C Controller IP Core - Driver API Reference
FPGA-TN-023421.16/26/2026PDF741.2 KB
I3C Target Driver API Reference
FPGA-TN-023381.012/21/2023PDF769.7 KB
Implementing High-Speed Interfaces with MachXO2 Devices
FPGA-TN-021531.96/29/2021PDF2.4 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
MachXO2 100-Pin TQFP Package Migration File
1.43/23/2012CSV12 KB
MachXO2 132-Pin csBGA Package Migration File
1.43/23/2012CSV19.4 KB
MachXO2 144-Pin TQFP Package Migration File
1.33/23/2012CSV22.3 KB
MachXO2 256-Pin caBGA Package Migration File
1.33/23/2012CSV23.9 KB
MachXO2 256-Pin ftBGA Package Migration File
1.33/23/2012CSV31.3 KB
MachXO2 32-Pin QFN Package Migration File
1.414/8/2015CSV2.2 KB
MachXO2 332-Pin caBGA Package Migration File
1.33/23/2012CSV20.4 KB
MachXO2 48-Pin QFN Package Migration File
1.47/1/2016CSV3.3 KB
MachXO2 484-Pin fpBGA Package Migration File
1.33/23/2012CSV39.8 KB
MachXO2 Family Data Sheet
FPGA-DS-020564.78/19/2026PDF2.3 MB
MachXO2 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
FPGA-DS-020621.37/11/2021PDF255.9 KB
MachXO2 Hardware Checklist
FPGA-TN-021542.211/5/2025PDF698.7 KB
MachXO2 Programming and Configuration User Guide
FPGA-TN-021555.05/6/2026PDF1.3 MB
MachXO2 SED User Guide
FPGA-TN-021562.210/21/2024PDF372.3 KB
MachXO2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-021573.04/9/2022PDF1.4 MB
MachXO2 sysIO User Guide
FPGA-TN-021582.44/15/2026PDF1.2 MB
MachXO2-1200 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		FPGA-SC-020091.4411/16/2020CSV8.4 KB
MachXO2-1200U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above		1.13/23/2012CSV13.1 KB
MachXO2-2000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.22/14/2014CSV18.3 KB
MachXO2-2000U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV30.5 KB
MachXO2-256 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.38/4/2016CSV6.5 KB
MachXO2-4000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.55/6/2026CSV38.6 KB
MachXO2-640 Pinout
Note: a pinout file can be exported from Diamond version 1.4 or above.		1.38/4/2016CSV6.1 KB
MachXO2-640U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV6 KB
MachXO2-7000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV30.4 KB
Memory Usage Guide for MachXO2 Devices
FPGA-TN-021591.47/24/2020PDF4.7 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-020901.412/11/2025PDF957.3 KB
Package Diagrams
FPGA-DS-020538.87/14/2026PDF9.6 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-021601.57/30/2021PDF561.6 KB
Power Estimation and Management for MachXO2 Devices
FPGA-TN-021611.75/19/2024PDF451.1 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-023411.26/26/2025PDF568.1 KB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices
FPGA-TN-021624.84/30/2022PDF2.5 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide
FPGA-TN-021632.94/15/2025PDF2.5 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB
标题编号版本日期格式文件大小
选择全部
MachXO2 Family Data Sheet
FPGA-DS-020564.78/19/2026PDF2.3 MB
MachXO2 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
FPGA-DS-020621.37/11/2021PDF255.9 KB
标题编号版本日期格式文件大小
选择全部
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-020111.210/11/2019PDF2.1 MB
Designing for Migration from MachXO2-1200-R1 to Standard (Non-R1) Devices
FPGA-AN-020121.31/22/2021PDF686.9 KB
I3C Controller IP Core - Driver API Reference
FPGA-TN-023421.16/26/2026PDF741.2 KB
I3C Target Driver API Reference
FPGA-TN-023381.012/21/2023PDF769.7 KB
Implementing High-Speed Interfaces with MachXO2 Devices
FPGA-TN-021531.96/29/2021PDF2.4 MB
Implementing High-Speed Interfaces with MachXO2 Devices (Japanese)
TN1203J1.71/1/2014PDF2.9 MB
MachXO2 Hardware Checklist
FPGA-TN-021542.211/5/2025PDF698.7 KB
MachXO2 Programming and Configuration Usage Guide (Japanese Language Version)
TN1204J3.64/1/2015PDF2.9 MB
MachXO2 Programming and Configuration User Guide
FPGA-TN-021555.05/6/2026PDF1.3 MB
MachXO2 SED Usage Guide (Japanese Language Version)
TN1206J1.912/1/2013PDF349.1 KB
MachXO2 SED User Guide
FPGA-TN-021562.210/21/2024PDF372.3 KB
MachXO2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-021573.04/9/2022PDF1.4 MB
MachXO2 sysCLOCK PLL Design and Usage Guide (Japanese Language Version)
TN1199J2.56/1/2014PDF2.1 MB
MachXO2 sysIO Usage Guide (Japanese Language Version)
TN1202J2.05/1/2015PDF1.4 MB
MachXO2 sysIO User Guide
FPGA-TN-021582.44/15/2026PDF1.2 MB
Memory Usage Guide for MachXO2 Devices
FPGA-TN-021591.47/24/2020PDF4.7 MB
Memory Usage Guide for MachXO2 Devices (Japanese Language Version)
TN1201J1.37/1/2013PDF2.2 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-020811.27/15/2026PDF2.8 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-020901.412/11/2025PDF957.3 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-021601.57/30/2021PDF561.6 KB
Power Estimation and Management for MachXO2 Devices
FPGA-TN-021611.75/19/2024PDF451.1 KB
Power Estimation and Management for MachXO2 Devices (Japanese Language Version)
TN1198J1.312/26/2012PDF548.6 KB
Single Event Upset (SEU) Report for MachXO2, MachXO3, and MachXO3D
FPGA-TN-021461.211/30/2023PDF261 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-023411.26/26/2025PDF568.1 KB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices
FPGA-TN-021624.84/30/2022PDF2.5 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices (Japanese Language Version)
TN1205J4.49/1/2014PDF1.3 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide
FPGA-TN-021632.94/15/2025PDF2.5 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide (Japanese Language Version)
TN1246J2.12/1/2015PDF3.1 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB
标题编号版本日期格式文件大小
选择全部
MachXO2 100-Pin TQFP Package Migration File
1.43/23/2012CSV12 KB
MachXO2 132-Pin csBGA Package Migration File
1.43/23/2012CSV19.4 KB
MachXO2 144-Pin TQFP Package Migration File
1.33/23/2012CSV22.3 KB
MachXO2 256-Pin caBGA Package Migration File
1.33/23/2012CSV23.9 KB
MachXO2 256-Pin ftBGA Package Migration File
1.33/23/2012CSV31.3 KB
MachXO2 32-Pin QFN Package Migration File
1.414/8/2015CSV2.2 KB
MachXO2 332-Pin caBGA Package Migration File
1.33/23/2012CSV20.4 KB
MachXO2 48-Pin QFN Package Migration File
1.47/1/2016CSV3.3 KB
MachXO2 484-Pin fpBGA Package Migration File
1.33/23/2012CSV39.8 KB
MachXO2-1200 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		FPGA-SC-020091.4411/16/2020CSV8.4 KB
MachXO2-1200-100pinTQFP-DD
1.01/10/2024CSV4.5 KB
MachXO2-1200-144pinTQFP-DD
1.01/10/2024CSV4.6 KB
MachXO2-1200-CSBGA132-DD
1.01/10/2024CSV4.5 KB
MachXO2-1200U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above		1.13/23/2012CSV13.1 KB
MachXO2-2000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.22/14/2014CSV18.3 KB
MachXO2-2000-100pinTQFP-DD
1.01/10/2024CSV9.8 KB
MachXO2-2000-144pinTQFP-DD
1.01/10/2024CSV9.6 KB
MachXO2-2000-CABGA256-DD
1.01/10/2024CSV10.1 KB
MachXO2-2000-CSBGA132-DD
1.01/10/2024CSV9.7 KB
MachXO2-2000-FTBGA256-DD
1.01/10/2024CSV10.1 KB
MachXO2-2000U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV30.5 KB
MachXO2-256 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.38/4/2016CSV6.5 KB
MachXO2-256-100pinTQFP-DD
1.01/10/2024CSV3.1 KB
MachXO2-4000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.55/6/2026CSV38.6 KB
MachXO2-4000-144pinTQFP-DD
1.01/10/2024CSV12.3 KB
MachXO2-4000-CSBGA132-DD
1.01/10/2024CSV12.4 KB
MachXO2-4000-FTBGA256-DD
1.03/19/2024CSV12.8 KB
MachXO2-640 Pinout
Note: a pinout file can be exported from Diamond version 1.4 or above.		1.38/4/2016CSV6.1 KB
MachXO2-640-100pinTQFP-DD
1.01/10/2024CSV3.5 KB
MachXO2-640U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV6 KB
MachXO2-7000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above.		1.13/23/2012CSV30.4 KB
Package Diagrams
FPGA-DS-020538.87/14/2026PDF9.6 MB
标题编号版本日期格式文件大小
选择全部
DDR & DDR2 SDRAM Controller- Pipelined (MachXO2) IP Core User's Guide
ipug931.23/20/2015PDF3.5 MB
DDR2 SDRAM IP Core User's Guide
IPUG10501.09/10/2012PDF3.5 MB
Display Interface Multiplexer User's Guide
ipug951.011/8/2010PDF983.2 KB
LPDDR SDRAM Controller IP Core User's Guide
IPUG921.32/1/2014PDF2.6 MB
LPDDR3 SDRAM Controller IP Core User's Guide
IPUG1101.09/23/2014PDF3 MB
MachXO2 and MachXO3 Starter Kit Evaluation Board User Guide
FPGA-EB-020361.41/31/2022PDF1.8 MB
MachXO2 Hardened I2C Master/Slave Demo User's Guide
UG551.05/1/2012PDF1.4 MB
MachXO2 Hardened SPI Master/Slave Demo
UG5601.15/24/2012PDF682.1 KB
MachXO2 Low Power Control Demo User's Guide
UG581.05/1/2012PDF1.2 MB
MachXO2 Master SPI/I2C Demo Using C User's Guide
UG541.13/1/2015PDF2.7 MB
MachXO2 Programming Via WISHBONE Interface User's Guide
UG571.05/1/2012PDF1.3 MB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2		IPUG189.211/8/2010PDF4.6 MB
标题编号版本日期格式文件大小
选择全部
Advanced SDR SDRAM Controller - Design Documentation
FPGA-RD-020874.91/22/2021PDF1.1 MB
Advanced SDR SDRAM Controller - Source Code
RD10104.89/12/2014ZIP495.7 KB
CompactFlash Controller - Documentation
FPGA-RD-020881.41/22/2021PDF1.7 MB
CompactFlash Controller - Source Code
RD10401.411/8/2010ZIP1.5 MB
Control Link Serial Interface - Documentation
FPGA-RD-020891.51/22/2021PDF810.2 KB
Control Link Serial Interface - Source Code
RD10511.411/8/2010ZIP240.7 KB
Fast Page Mode SDRAM Controller - Documentation
FPGA-RD-020902.41/22/2021PDF887.1 KB
Fast Page Mode SDRAM Controller - Source Code
RD10142.311/8/2010ZIP110.4 KB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD10055.83/6/2014PDF987.4 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD10055.91/10/2015ZIP809.7 KB
I2C Controller for Serial EEPROMs - Documentation
RD10062.63/5/2014PDF767.9 KB
I2C Controller for Serial EEPROMs - Source Code
RD10062.71/12/2015ZIP613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD10461.61/15/2015PDF1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code
RD10461.82/1/2016ZIP1.4 MB
I2C Slave Peripheral using Embedded Function Block - Documentation
FPGA-RD-020731.511/8/2021PDF1.1 MB
I2C Slave Peripheral using Embedded Function Block - Source Code
FPGA-RD-020731.511/8/2021ZIP1015.5 KB
I2C to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-021901.05/16/2020PDF1.5 MB
I2C to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-021901.05/16/2020ZIP1.3 MB
I2S Controller with WISHBONE Interface Reference Design - Source Code
RD11011.13/1/2014ZIP1.6 MB
I2S Controller with WISHBONE Interface Reference Design Documentation
RD11011.13/1/2014PDF2.4 MB
LatticeMico8 v3.15 Core Verilog Source Code
RD10263.1510/8/2010ZIP944.6 KB
LED/OLED Driver - Documentation
RD11031.13/1/2014PDF989.6 KB
LED/OLED Driver - Source code
RD11031.13/1/2014ZIP1.4 MB
MachXO2 I2C Embedded Programming Access Firmware
RD11291.11/18/2015ZIP3.1 MB
MachXO2 I2C Embedded Programming Access Firmware User's Guide
FPGA-RD-020911.21/22/2021PDF1.8 MB
MachXO2 Soft I2C Slave with Clock Stretching - Documentation
FPGA-RD-020921.21/22/2021PDF1.1 MB
MachXO2 Soft I2C Slave With Clock Stretching - Source Code
RD11861.211/28/2014ZIP1.2 MB
MachXO2, MachXO3 and ECP5 7:1 LVDS Video Interface - Documentation
FPGA-RD-020931.51/22/2021PDF1.2 MB
MachXO2, MachXO3 and ECP5 7:1 LVDS Video Interface - Source code
RD10931.49/17/2015ZIP1.9 MB
Memory Stick PRO Host Interface
FPGA-RD-020941.11/22/2021PDF1.2 MB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD11461.412/28/2016ZIP4.3 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
FPGA-RD-021311.61/31/2021PDF1.4 MB
NAND Flash Controller - Source Code
RD10551.411/8/2014ZIP912.7 KB
NAND Flash Controller Design - Documentation
FPGA-RD-020951.31/22/2021PDF1.6 MB
NOR Flash Memory Controller with WISHBONE Interface - Documentation
FPGA-RD-020961.21/22/2021PDF1.6 MB
NOR Flash Memory Controller with WISHBONE Interface - Source Code
RD10871.111/8/2010ZIP198.1 KB
Parallel to MIPI CSI-2 TX Bridge - Documentation
FPGA-RD-021321.68/19/2021PDF1.1 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD11831.51/1/2015ZIP1.2 MB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-021331.61/31/2021PDF1.2 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD11841.51/1/2015ZIP2.6 MB
Power Management Bus Reference Design - Source Code
RD11001.112/23/2011ZIP378.3 KB
Power Management Bus Reference Design Documentation
FPGA-RD-020971.21/22/2021PDF1.1 MB
PWM Fan Controller
RD10601.69/10/2014PDF481.5 KB
PWM Fan Controller - Source Code
RD10601.71/16/2015ZIP2.9 MB
RAM-Type Interface for Embedded User Flash Memory – Source Code
FPGA-RD-020981.69/26/2021ZIP1.5 MB
RAM-Type Interface for Embedded User Flash Memory Reference Design – Documentation
FPGA-RD-020981.69/26/2021PDF1.7 MB
Read and Write Usercode - Documentation
RD10411.49/17/2014PDF831.5 KB
Read and Write Usercode - Source Code
RD10411.33/1/2014ZIP618.2 KB
SD Flash Controller Using SD Bus - Documentation
RD10881.43/12/2014PDF1.4 MB
SD Flash Controller Using SD Bus - Source Code
RD10881.43/12/2014ZIP5 MB
Simple Sigma-Delta ADC - Source Code
1.59/26/2018ZIP1.5 MB
Simple Sigma-Delta ADC, Documentation
FPGA-RD-020471.61/30/2020PDF971 KB
Single-Wire Controller for Digital Temp Sensors Reference Design - Source Code
RD10991.011/8/2010ZIP513.1 KB
Single-Wire Controller for Digital Temp. Sensors Reference Design - Documentation
FPGA-RD-020991.11/22/2021PDF1.1 MB
SMBus Controller Reference Design - Documentation
FPGA-RD-021001.11/22/2021PDF1.3 MB
SMBus Controller Reference Design Source Code
RD10981.011/8/2010ZIP2.2 MB
SPI Flash Controller with Wear Leveling
FPGA-RD-021011.11/29/2021PDF1 MB
SPI Flash Controller with Wear Leveling - Source code
RD11021.011/8/2010ZIP952.2 KB
SPI Slave Peripheral Using the Embedded Function Block
RD11251.31/1/2015PDF1.2 MB
SPI Slave Peripheral Using the Embedded Function Block Reference Design
RD11251.31/1/2015ZIP730.6 KB
SPI to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-021911.05/16/2020PDF1.6 MB
SPI to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-021911.05/16/2020ZIP1.3 MB
SPI WISHBONE Controller - Documentation
RD10441.73/1/2014PDF960 KB
SPI WISHBONE Controller - Source Code
RD10441.81/12/2015ZIP477.7 KB
WISHBONE UART - Documentation
FPGA-RD-021371.72/5/2021PDF1.1 MB
WISHBONE UART - Source Code
RD10421.612/1/2014ZIP58.5 MB
WISHBONE-Compatible LCD Controller - Documentation
FPGA-RD-021021.31/29/2021PDF918.3 KB
WISHBONE-Compatible LCD Controller - Source Code
RD10531.211/8/2010ZIP140.9 KB
标题编号版本日期格式文件大小
选择全部
I2C Read-back Failure Mode on Specific Use Scenario in MachXO2, MachXO3, and MachXO4 Products and Work-Around Solutions
PB14121.22/3/2026PDF276.2 KB
MachXO2/MachXO3/MachXO4/LPTM21 WISHBONE Flash Corruption Avoidance
PB13811.22/3/2026PDF347.3 KB
Work-Around Solutions for Platform Manager 2, MachXO2, MachXO3, and MachXO4 in SPI Programming Failure Modes
PB2311011.12/3/2026PDF436.7 KB
标题编号版本日期格式文件大小
选择全部
ACN03D-11 Withdrawal of ACN03C-11
Material Set		ANC03D-1114/1/2011PDF796.6 KB
Notification of Alternate Additional Assembly Qualification for MXO2-MXO3-MXO3D FPGA Products
PCN26-01B6/18/2026PDF149.8 KB
PCN 03A-16 MachXO2/XO3 Datasheet Change
Data Sheet		1.13/22/2016PDF367.7 KB
PCN 03C13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set		PCN03C1.011/14/2014PDF212.8 KB
PCN 07B-16 ATT AQMS-Assembly-Test XO2-1200 WLCSP
6/13/2016PDF435.6 KB
PCN 09A-12 Affected Devices
Assembly Site		PCN09A-121.05/14/2012XLSX121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-121.05/14/2012PDF160.2 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-121.05/11/2012PDF178.9 KB
PCN 09A-12 Material Set Changes
Assembly Site		PCN09A-121.05/14/2012XLSX121 KB
PCN 10A-13 Notification of Changes to the MachXO2 Family Data Sheet
Data Sheet		PCN10A-131.09/30/2013PDF119.9 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-136/28/2013PDF202.5 KB
PCN03A-13 Device Characterization Report
PCN03A-136/28/2013PDF981.3 KB
PCN03A-13 FAQs
PCN03A-136/28/2013PDF458.3 KB
PCN03A-14 Characterization Report
PCN03A-141.04/4/2014PDF919.5 KB
PCN03A-14 FAQ
PCN03A-141.04/4/2014PDF452.5 KB
PCN03A-14 Material Set Table
PCN03A-141.04/4/2014XLSX26.9 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-141.011/21/2014PDF229.9 KB
PCN03C-13 Affected Part Number and Material Sets
PCN03C-136/28/2013XLSX51.2 KB
PCN03C-14 Affected Part Number List
PCN03C-141.04/4/2014XLSX50.8 KB
PCN06A-14 Characterization Report
PCN06A-141.010/3/2014PDF563.7 KB
PCN06A-14 Material Set Table
PCN06A-141.010/3/2014XLSX13.7 KB
PCN06B-12 Notification of Changes to the MachXO2 Family Datasheet
Data Sheet		PCN06B-121.04/16/2012PDF211.8 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-141.011/21/2014PDF229.5 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set		PCN06C-111.08/1/2011PDF838.5 KB
PCN06C-14 Affected Device List
PCN06C-141.010/3/2014XLSX29.6 KB
PCN07A-12 Notification of Intent to Utilize an Alternate Qualified Mask Set for the Lattice MachXO2 256ZE Devices
Mask Set		PCN07A-121.03/19/2012PDF106.6 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set		PCN07C-111.08/1/2011PDF917.9 KB
PCN08A13_AffectedDevices
Other		PCN08A-1319/26/2013XLSX78.2 KB
PCN09A-11 Notification of Intent to Transition from the MachXO2-1200 R1 to the Standard MachXO2-1200 Ordering Part Number
Conversion, Discontinuance		PCN09A-111.07/18/2011PDF56.2 KB
PCN09A-19 ASEK Second Source Qualification for Selected Products
PCN09A-191/9/2020PDF359 KB
PCN09A-19 BOM comparison final
PCN09A-192.01/8/2020XLSX24.8 KB
PCN09A-19 Consolidation Qual External Changes
1/9/2020PDF326.2 KB
PCN10A-11 Notification of Intent to Freeze ispLEVER After Version 8.2
Conversion		PCN10A-111.07/25/2011PDF52.7 KB
PCN10A13_AffectedPartNumbers
PCN10A-1319/26/2013XLSX33 KB
Power Calculator Update for All XO2 and Derivative (XO2/XO3L/XO3LF/XO3D/PlatformManager2) Devices
PCN02A-201.11/14/2021PDF28.6 KB
Standard OPNs for ASEK PCN09A-19
2.01/8/2020XLSX24.4 KB
标题编号版本日期格式文件大小
选择全部
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
标题编号版本日期格式文件大小
选择全部
MachXO2 WLCSP Packaging News Brief
NB1059/26/2011PDF517.1 KB
MachXO2产品手册
I0221C2.010/30/2024PDF1.5 MB
MIPI Display Serial Interface Solution Product Flyer
I0241C2.010/22/2013PDF1.8 MB
Ultra Low Density FPGAs Brochure (Japanese)
I0229J1.05/22/2013PDF2.2 MB
标题编号版本日期格式文件大小
选择全部
32 QFNS Pb-Free Device Material Content
Includes all 3 versions		D4/19/2016PDF43.4 KB
BG256_XO2
Rev O16/9/2022PDF75.3 KB
BG256_XO3
Rev. O16/9/2022PDF75.3 KB
BG332
Rev G16/9/2022PDF155.2 KB
FG484_MachXO2
Rev K16/8/2022PDF28.3 KB
FTG256_v3_XO2
Rev Q16/9/2022PDF151.9 KB
MG132
Rev P16/21/2022PDF153.7 KB
MG184_XO2
Rev G16/21/2022PDF151.9 KB
QN84
Rev F7/29/2019PDF31.3 KB
SN_SG32
Rev I5/1/2024PDF145.6 KB
SN_SG48
Rev C19/20/2019PDF52.9 KB
SWG_UWG25
Rev B4/19/2018PDF40.6 KB
TN_TG_TQ144 Cu_wire all
Rev E112/21/2021PDF107.1 KB
TN_TG100 Cu_wire all
Rev D212/21/2021PDF25.4 KB
TN144_LA
Rev C4/25/2018PDF22.1 KB
UMG64_XO2
Rev R16/21/2022PDF148.2 KB
UWG49_XO2_XO3
Rev F16/25/2020PDF27.8 KB
标题编号版本日期格式文件大小
选择全部
Creating An ADC Using FPGA Resources
1.03/1/2010PDF272.2 KB
Dual Sensor Design Solution - White Paper (Chinese Language Version)
1.05/31/2012PDF236.6 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs (Chinese)
1.08/28/2013PDF660.7 KB
Implementing Video Display Interfaces Using MachXO2 PLDs
1.011/8/2010PDF173.8 KB
Implementing Video Display Interfaces Using MachXO2 PLDs (Chinese Language)
1.011/1/2010PDF503.7 KB
ImprovingNoiseImmunityforSerialInterface
1.08/5/2014PDF299 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages
1.07/1/2010PDF443.6 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages (Chinese Language)
1.07/1/2010PDF488.5 KB
Managing Image Data in Automotive Infotainment Applications Using Low Cost PLDs
1.08/4/2011PDF325.8 KB
Managing Image Data in Automotive Infotainment Applications Using Low Cost PLDs (Chinese Language)
1.08/1/2011PDF431.8 KB
Reducing Cost and Power in Consumer Applications Using PLDs
1.011/8/2010PDF354.4 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Chinese Language)
1.011/1/2010PDF496.4 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Traditional Chinese Language)
1.03/28/2011PDF785.2 KB
Solving Today's Interface Challenges With Ultra-Low-Density FPGA Bridging Solutions (Chinese)
1.08/8/2013PDF733.1 KB
The Challenges of Automotive Vision Systems Design
4/1/2007PDF341.5 KB
Upscale Your Product and Rebuild Business Resiliency – Migrating to Lattice FPGAs
WP00381.05/15/2024PDF2.2 MB
Using Low Cost, Non-Volatile PLDs in System Applications
2.08/30/2013PDF435.3 KB
Using Low Cost, Non-Volatile PLDs in System Applications (Chinese Language)
1.011/1/2010PDF246.2 KB
分布式PLD解决方案可降低服务器成本并提升灵活性
WP0091.08/1/2017PDF708.1 KB
创新的非易失性配置存储器技术使低成本、多次可编程的ULD FPGA成为现实
1.012/1/2013PDF241.8 KB
在嵌入式设计中采用基于D-PHY的MIPI标准外设
1.05/1/2014PDF495.9 KB
超低密度FPGA：实现硬件加速的新途径
1.06/4/2014PDF2.1 MB
革命性的硬件管理解决方案
WP00034.05/9/2018PDF1.4 MB
标题编号版本日期格式文件大小
选择全部
[BSDL] LCMXO2-1200HC csBGA 132
1.0312/1/2012BSM26.1 KB
[BSDL] LCMXO2-1200HC TQFP 100
1.0312/1/2012BSM23.7 KB
[BSDL] LCMXO2-1200HC TQFP 144
1.0312/1/2012BSM26.6 KB
[BSDL] LCMXO2-1200ZE/HE csBGA 132
1.0312/1/2012BSM26.1 KB
[BSDL] LCMXO2-1200ZE/HE TQFP 100
1.0312/1/2012BSM23.7 KB
[BSDL] LCMXO2-1200ZE/HE TQFP 144
1.0312/1/2012BSM26.6 KB
[BSDL] LCMXO2-2000HC caBGA 256
1.0312/1/2012BSM42.8 KB
[BSDL] LCMXO2-2000HC csBGA 132
1.0312/1/2012BSM33.6 KB
[BSDL] LCMXO2-2000HC ftBGA 256
1.0312/1/2012BSM42.8 KB
[BSDL] LCMXO2-2000HC TQFP 100
1.0312/1/2012BSM31.2 KB
[BSDL] LCMXO2-2000HC TQFP 144
1.0312/1/2012BSM34.3 KB
[BSDL] LCMXO2-2000ZE/HE caBGA 256
1.0312/1/2012BSM42.8 KB
[BSDL] LCMXO2-2000ZE/HE csBGA 132
1.0312/1/2012BSM33.6 KB
[BSDL] LCMXO2-2000ZE/HE ftBGA 256
1.0312/1/2012BSM42.8 KB
[BSDL] LCMXO2-2000ZE/HE TQFP 100
1.0312/1/2012BSM31.2 KB
[BSDL] LCMXO2-2000ZE/HE TQFP 144
1.0312/1/2012BSM34.3 KB
[BSDL] LCMXO2-256HC csBGA 132
1.0312/1/2012BSM19.5 KB
[BSDL] LCMXO2-256HC QFN 32
1.0312/1/2012BSM14.7 KB
[BSDL] LCMXO2-256HC TQFP 100
1.0312/1/2012BSM18.6 KB
[BSDL] LCMXO2-256HC ucBGA 64
1.0312/1/2012BSM17 KB
[BSDL] LCMXO2-256ZE QFN 32
1.0312/1/2012BSM14.7 KB
[BSDL] LCMXO2-256ZE/HE csBGA 132
1.0312/1/2012BSM19.5 KB
[BSDL] LCMXO2-256ZE/HE TQFP 100
1.0312/1/2012BSM18.6 KB
[BSDL] LCMXO2-256ZE/HE ucBGA 64
1.0312/1/2012BSM17 KB
[BSDL] LCMXO2-4000HC caBGA 256
1.0312/1/2012BSM47.4 KB
[BSDL] LCMXO2-4000HC caBGA 332
1.0312/1/2012BSM53.4 KB
[BSDL] LCMXO2-4000HC csBGA 132
1.0312/1/2012BSM38.1 KB
[BSDL] LCMXO2-4000HC fpBGA 484
1.0312/1/2012BSM57.7 KB
[BSDL] LCMXO2-4000ZE/HE caBGA 256
1.0312/1/2012BSM47.4 KB
[BSDL] LCMXO2-4000ZE/HE caBGA 332
1.0312/1/2012BSM53.4 KB
[BSDL] LCMXO2-4000ZE/HE csBGA 132
1.0312/1/2012BSM38.1 KB
[BSDL] LCMXO2-4000ZE/HE csBGA 184
1.0312/1/2012BSM42.1 KB
[BSDL] LCMXO2-4000ZE/HE fpBGA 484
1.0312/1/2012BSM57.7 KB
[BSDL] LCMXO2-640HC csBGA 132
1.0312/1/2012BSM22.5 KB
[BSDL] LCMXO2-640HC TQFP 100
1.0312/1/2012BSM21.6 KB
[BSDL] LCMXO2-640ZE/HE csBGA 132
1.0312/1/2012BSM22.5 KB
[BSDL] LCMXO2-640ZE/HE TQFP 100
1.0312/1/2012BSM21.6 KB
[BSDL] LCMXO2-1200HC QFN 32
1.043/14/2016BSM18.3 KB
[BSDL] LCMXO2-1200UHC ftBGA 256
1.0312/1/2012BSM42.7 KB
[BSDL] LCMXO2-1200ZE QFN 32
1.043/14/2016BSM18.3 KB
[BSDL] LCMXO2-1200ZE WLCSP 25
1.0312/1/2012BSM17.7 KB
[BSDL] LCMXO2-1200ZE WLCSP 36
FPGA-MD-020131.0412/2/2020BSM18.9 KB
[BSDL] LCMXO2-1200ZE WLCSP 49
1.041/17/2014BSM27.2 KB
[BSDL] LCMXO2-2000UHC fpBGA 484
1.0312/1/2012BSM57.8 KB
[BSDL] LCMXO2-256HC QFN 48
1.045/19/2016BSM16.1 KB
[BSDL] LCMXO2-256ZE QFN 48
1.045/19/2016BSM16.1 KB
[BSDL] LCMXO2-4000HC ftBGA 256
1.0312/1/2012BSM47.4 KB
[BSDL] LCMXO2-4000HC QFN 84
1.043/14/2016BSM34.3 KB
[BSDL] LCMXO2-4000HC TQFP 144
1.0312/1/2012BSM39 KB
[BSDL] LCMXO2-4000ZE QFN 84
1.043/14/2016BSM34.3 KB
[BSDL] LCMXO2-4000ZE WLCSP 81
FPGA-MD-020141.0412/2/2020BSM34 KB
[BSDL] LCMXO2-4000ZE/HE ftBGA 256
1.0312/1/2012BSM47.4 KB
[BSDL] LCMXO2-4000ZE/HE TQFP 144
1.0312/1/2012BSM39 KB
[BSDL] LCMXO2-640HC QFN 48
1.045/19/2016BSM17.8 KB
[BSDL] LCMXO2-640UHC TQFP 144
1.0312/1/2012BSM26.6 KB
[BSDL] LCMXO2-640ZE QFN 48
1.045/19/2016BSM17.8 KB
[BSDL] LCMXO2-7000HC caBGA 256
1.0312/1/2012BSM51.2 KB
[BSDL] LCMXO2-7000HC caBGA 332
1.0312/1/2012BSM57.4 KB
[BSDL] LCMXO2-7000HC fpBGA 484
1.0312/1/2012BSM64.8 KB
[BSDL] LCMXO2-7000HC ftBGA 256
1.0312/1/2012BSM51.2 KB
[BSDL] LCMXO2-7000HC TQFP 144
FPGA-MD-020331.044/10/2022BSM43.1 KB
[BSDL] LCMXO2-7000ZE/HE caBGA 256
1.0312/1/2012BSM51.2 KB
[BSDL] LCMXO2-7000ZE/HE caBGA 332
1.0312/1/2012BSM57.4 KB
[BSDL] LCMXO2-7000ZE/HE fpBGA 484
1.0312/1/2012BSM64.8 KB
[BSDL] LCMXO2-7000ZE/HE ftBGA 256
1.0312/1/2012BSM51.2 KB
[BSDL] LCMXO2-7000ZE/HE TQFP 144
1.0312/1/2012BSM42.8 KB
标题编号版本日期格式文件大小
选择全部
[IBIS] Lattice MachXO2
3.44/27/2016ZIP10 MB
标题编号版本日期格式文件大小
选择全部
BGA Breakout and Routing Example - BG256
ZIP file containing BGA Break out rules for Mach XO2-256 caBGA		TN10741.01/18/2012ZIP851.1 KB
BGA Breakout and Routing Example - BG332
ZIP file containing BGA break out rules for Machxo2-332caBGA		TN10741.01/18/2012ZIP847 KB
BGA Breakout and Routing Example - FG484
ZIP file containing BGA break out rules for MachXO2-484fpBGA		TN10741.01/18/2012ZIP1.1 MB
BGA Breakout and Routing Example - FTG256
ZIP file containing BGA Break Out rules for Mach XO2-256 ftBGA		TN10741.01/18/2012ZIP806 KB
BGA Breakout and Routing Example - MG132
ZIP File containing BGA Break Out rules for Mach XO2-132 csBGA		TN10741.01/18/2012ZIP773.6 KB
BGA Breakout and Routing Example - UMG64
ZIP File containing PCB files, & Gerber files for Mach XO2 -64ucBGA		TN10741.01/18/2012ZIP630.2 KB
MachXO2 Hardened I2C Master/Slave Demo
Demonstrates the usage of the hardened 		2.05/1/2012ZIP914.3 KB
MachXO2 Hardened I2C/SPI Master Demo Using C
Uses a MachXO2 Pico Evaluation Board to read the temperature and display it on the LCD screen and also in a terminal window on a PC. The purpose of the demo is to demonstrate use of the MachXO2 Embedded Function Block (EFB) I2C & SPI Master controller		1.05/1/2012ZIP4 MB
MachXO2 Hardened SPI Master/Slave Demo
Demonstrates the use of the hardened SPI core as both master and slave on two MachXO2 Pico Evaluation Boards. One board is configured as SPI master and the other as SPI slave. The Slave design utilizes RD1125 for the SPI slave peripheral interface		1.15/24/2012ZIP423.1 KB
MachXO2 Low Power Control Demo
Demonstrates various power saving design and operation techniques available on the MachXO2.		1.05/1/2012ZIP937.2 KB
MachXO2 Programming Via WISHBONE Interface
Demonstrates the feasibility of self-reconfiguration: A user design operating in the programmable fabric altering and enabling the contents of Configuration Flash Memory via the EFB WISHBONE interface.		1.05/1/2012ZIP702.4 KB
MN34041 Sensor NanoVesta Headboard Bitstream
© Helion GmbH, Germany, 2011-2013 		3/21/2012BIT2.5 MB

支持

技术支持

有问题？我们来帮助您

授权

发现您需要的软件和IP授权

质量和可靠性

参考资料帮助解答您的问题

服务

外部资源帮助您完成工作