The LatticeEC Standard Evaluation Board is a stable yet flexible platform designed to help the user quickly evaluate the performance of LatticeEC or LatticeECP FPGAs or aid in development of custom designs. For more advanced evaluation or development options, see the LatticeEC Advanced Evaluation Board.
Device Support
You will need to following software to use this board:
- ispLEVER for design, fitting, place & route of Lattice programmable devices
- ispVM to download your program to the device or SPI Flash
PCI Master/Target 33 MHz/32-bit Demo Package
A demo package is available which demonstrates features and capabilities of the Lattice PCI Master/Target 33 MHz/32-bit IP core implemented into a LatticeEC FPGA. A demo bitstream, application, driver files, and user's guide are included in the demo package. With this package, users can configure the IP core, access I/O and memory space, process interrupts, and perform DMA operation. An example driver is included which may be used as a starting template for driver development. The LatticeEC standard evaluation board with the LFEC6E-4F484C device is required to use the demo.
The demo package is released as a zipped file. Simply download the file and unzip it. The pre-configured bitstream along is included, and must be loaded into the LatticeECP/EC FPGA. Other Lattice tools that may be needed are ispVM® System software to download the bitstream, and ispLEVER® design tools if any changes to the design are to be made. The application and driver must be installed prior to running the demo.
Please refer to the design files link on the left to access the demo package and user's guide. Lattice also provides other pre-configured IP demonstration bitstreams for use with this evaluation board which can also be found in the design files section.
