SPI and UART are among the most commonly-used protocols in today’s embedded applications. Often, there is a requirement to expand a single SPI master to several UART interfaces or to have a bridge between SPI and UART interfaces due to peripheral limitations in processors interacting with each other. The SPI-to-UART Expander provides a cost-effective solution for communicating from a host processor’s SPI bus to multiple UART devices. This reference design acts as a SPI port expander, multiplexing and demultiplexing read/write data through the SPI slave to multiple UARTs using iCE40™ FPGAs.
The SPI-to-UART Expander interfaces the host processor/microcontroller’s SPI master to a number of UARTs through a SPI slave.
Features
- SPI slave which interfaces with the SPI master in the host processor and acts as a port expander
- Multiplexer/Demultiplexer to write/read data from UARTs. This interface module selects the appropriate UART device based on address and mode bits on the MOSI frame and performs the following operations:
- Writes the configuration register and configures baud rate, data length, enables/disables parity and parity type (even/odd)
- Writes data to the UART write register/FIFO
- Reads data from the UART status register
- Reads data from the UART’s read FIFO. This data is communicated to host processor through the MISO line. The SPI slave operates in CPOL = 0 and CPHA = 0 mode, MSB first read/write and is configured for a 16-bit SPI data frame.
